Manual

3
4596A–RKE–05/06
ATA5745/ATA5746 [Preliminary]
Figure 1-2. Pinning QFN24
Table 1-1. Pin Description
Pin Symbol Function
1 TEST2 Test pin, during operation at GND
2 TEST1 Test pin, during operation at GND
3 CLK_OUT Output to clock a connected microcontroller
4 CLK_OUT_CTRL1 Input to control CLK_OUT (MSB)
5 CLK_OUT_CTRL0 Input to control CLK_OUT (LSB)
6 ENABLE Input to enable the XTO
7 XTAL2 Reference crystal
8 XTAL1 Reference crystal
9 DVCC Digital voltage supply blocking
10 VS5V Power supply input for voltage range 4.5V to 5.5V
11 VS3V_AVCC Power supply input for voltage range 2.7V to 3.3V
12 GND Ground
13 LNA_GND RF ground
14 LNA_IN RF input
15 SENSE Sensitivity control resistor
16 SENSE_CTRL
Sensitivity selection
Low: Normal sensitivity, High: Reduced sensitivity
17 RSSI Output of the RSSI amplifier
18 TEST3 Test pin, during operation at GND
19 RX Input to activate the receiver
20 BR0 Bit rate selection, LSB
21 BR1 Bit rate selection, MSB
22 ASK_NFSK
FSK/ASK selection
Low: FSK, High: ASK
23 CDEM Capacitor to adjust the lower cut-off frequency data filter
24 DATA_OUT Data output
GND Ground/backplane (exposed die pad)
TEST3
DATA_OUT BR1 RX BR0 ASK_NFSK CDEM
XTAL2
VS5V
GND
V
S3V_AVCC
DVCC
XTAL1
RSSI
LNA_IN
LNA_GND
SENSE
SENSE_CTRL
TEST2
789101112
24
13
14
15
16
17
18
6
5
4
3
2
1
23 22
TEST1
CLK_OUT_CTRL0
ENABLE
CLK_OUT_CTRL1
CLK_OUT
21 20 19