Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview
- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents
90
AT90S/LS4433
1042G–AVR–09/02
Figure 64. Programming the Flash Waveforms (Continued)
Reading the Flash The algorithm for reading the Flash memory is as follows (refer to “Programming the
Flash” for details on command and address loading):
A: Load Command “0000 0010”.
B: Load Address High Byte ($00 - $07).
C: Load Address Low Byte ($00 - $FF).
1. Set OE
to “0”, and BS to “0”. The Flash word Low Byte can now be read at
DATA.
2. Set BS to “1”. The Flash word High Byte can now be read from DATA.
3. Set OE
to “1”.
Programming the EEPROM The programming algorithm for the EEPROM Data memory is as follows (refer to “Pro-
gramming the Flash” for details on command, address and data loading):
A: Load Command “0001 0001”.
B: Load Address Low Byte ($00 - $FF).
C: Load Data Low Byte ($00 - $FF).
D: Write Data Low Byte.
Reading the EEPROM The algorithm for reading the EEPROM memory is as follows (refer to “Programming the
Flash” for details on command and address loading):
A: Load Command “0000 0011”.
B: Load Address Low Byte ($00 - $FF).
1. Set OE
to “0”, and BS to “0”. The EEPROM data byte can now be read at DATA.
2. Set OE
to “1”.
DATA HIGH
DATA
XA1
XA0
BS
XTAL1
WR
RDY/BSY
RESET
+12V
OE