Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
 
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
 
- Sleep Modes
 
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents

85
AT90S/LS4433
1042G–AVR–09/02
Memory
Programming
Program and Data
Memory Lock Bits
The AT90S4433 MCU provides two Lock bits, which can be left unprogrammed (“1”)or
canbeprogrammed(“0”) to obtain the additional features listed in Table 28. The Lock
bits can only be erased with the Chip Erase command.
Note: 1. In Parallel mode, programming of the Fuse bits are also disabled. Program the Fuse
bits before programming the Lock bits.
Fuse Bits The AT90S4433 has six Fuse bits, SPIEN, BODLEVEL, BODEN and CKSEL2..0.
• When the SPIEN Fuse is programmed (“0”), Serial Program and Data Downloading
is enabled. Default value is programmed (“0”). This bit is not accessible in Serial
Programming mode.
• The BODLEVEL Fuse selects the Brown-out Detection Level and changes the start-
up times. See “Brown-out Detection” on page 25. Default value is unprogrammed
(“1”).
• When the BODEN Fuse is programmed (“0”), the Brown-out Detector is enabled.
See “Brown-out Detection” on page 25. Default value is unprogrammed (“1”).
• CKSEL2..0: See Table 5 on page 23 for which combination of CKSEL2..0 to use.
Default value is “010”.
Signature Bytes All Atmel microcontrollers have a 3-byte signature code that identifies the device. This
code can be read in both serial and parallel mode. The three bytes reside in a separate
address space.
For the AT90S4433
(1)
they are:
1. $000: $1E (indicates manufactured by Atmel)
2. $001: $92 (indicates 4 KB Flash memory)
3. $002: $03 (indicates AT90S4433 device when signature byte $001 is $92)
Note: 1. When both Lock bits are programmed (Lock mode 3), the signature bytes cannot be
read in Serial mode. Reading the signature bytes will return $00, $01 and $02.
Table 28. Lock Bit Protection Modes
Memory Lock Bits
Protection TypeMode LB1 LB2
1 1 1 No memory lock features enabled.
2 0 1 Further programming of the Flash and EEPROM is disabled.
(1)
3 0 0 Same as mode 2, and verify is also disabled.










