Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview
- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents
81
AT90S/LS4433
1042G–AVR–09/02
Port D as General Digital I/O PDn, General I/O pin: The DDDn bit in the DDRD Register selects the direction of this
pin. If DDDn is set (one), PDn is configured as an output pin. If DDDn is cleared (zero),
PDn is configured as an input pin. If PDn is set (one) when configured as an input pin,
the MOS pull-up resistor is activated. To switch the pull-up resistor off, the PDn has to
be cleared (zero) or the pin has to be configured as an output pin.The port pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Note: 1. n: 7,6..0, pin number.
Alternate Functions of Port D • AIN1 – Port D, Bit 7
AIN1, Analog Comparator Negative Input. When configured as an input (DDD7 is
cleared [zero]), and with the internal MOS pull-up resistor switched off (PD7 is cleared
[zero]), this pin also serves as the negative input of the On-chip Analog Comparator.
During Power-down mode, the Schmitt trigger of the digital input is disconnected. This
allows analog signals, which are close to V
CC
/2, to be present during Power-down with-
out causing excessive power consumption.
• AIN0 – Port D, Bit 6
AIN0, Analog Comparator Positive Input. When configured as an input (DDD6 is cleared
[zero]), and with the internal MOS pull-up resistor switched off (PD6 is cleared [zero]),
this pin also serves as the positive input of the On-chip Analog Comparator. During
Power-down mode, the Schmitt trigger of the digital input is disconnected. This allows
analog signals, which are close to V
CC
/2, to be present during Power-down without
causing excessive power consumption.
• T1 – Port D, Bit 5
T1, Timer/Counter1 Counter Source. See the Timer description for further details
• T0 – Port D, Bit 4
T0: Timer/Counter0 Counter Source. See the Timer description for further details.
• INT1 – Port D, Bit 3
INT1, External Interrupt Source 1: The PD3 pin can serve as an external interrupt
source to the MCU. See the interrupt description for further details and how to enable
the source.
• INT0 – Port D, Bit 2
INT0, External Interrupt Source 0: The PD2 pin can serve as an external interrupt
source to the MCU. See the interrupt description for further details and how to enable
the source.
Table 27. DDDn Bits on Port D Pins
(1)
DDDn PORTDn I/O Pull-up Comment
0 0 Input No Tri-state (high-Z)
0 1 Input Yes PDn will source current if ext. pulled low.
1 0 Output No Push-pull Zero Output
1 1 Output No Push-pull One Output