Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview
- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents
78
AT90S/LS4433
1042G–AVR–09/02
Port C Data Register – PORTC
Port C Data Direction Register
– DDRC
Port C Input Pins Address –
PINC
The Port C Input Pins address (PINC) is not a register; this address enables access to
the physical value on each Port C pin. When reading PORTC, the Port C Data Latch is
read, and when reading PINC, the logical values present on the pins are read.
Port C as General Digital I/O All six pins in Port C have equal functionality when used as digital I/O pins.
PCn, general I/O pin: The DDCn bit in the DDRC Register selects the direction of this
pin. If DDCn is set (one), PCn is configured as an output pin. If DDCn is cleared (zero),
PCn is configured as an input pin. If PORTCn is set (one) when the pin is configured as
an input pin, the MOS pull-up resistor is activated. To switch the pull-up resistor off,
PORTCn has to be cleared (zero) or the pin has to be configured as an output pin.The
port pins are tri-stated when a reset condition becomes active, even if the clock is not
running.
Note: 1. n: 5..0, pin number
Bit 76543210
$15 ($35)
––PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 PORTC
Read/Write R R R/W R/W R/W R/W R/W R/W
InitialValue00000000
Bit 76543210
$14 ($34) ––DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 DDRC
Read/Write R R R/W R/W R/W R/W R/W R/W
InitialValue00000000
Bit 76543210
$13 ($33) ––PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 PINC
Read/Write R R R RRRRR
Initial Value 0 0 N/A N/A N/A N/A N/A N/A
Table 25. DDCn Effects on Port C Pins
(1)
DDCn PORTCn I/O Pull-up Comment
0 0 Input No Tri-state (high-Z)
0 1 Input Yes PCn will source current if ext. pulled low.
1 0 Output No Push-pull Zero Output
1 1 Output No Push-pull One Output