Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview
- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents
77
AT90S/LS4433
1042G–AVR–09/02
Figure 55. Port B Schematic Diagram (Pin PB5)
Port C Port C is a 6-bit bi-directional I/O port.
Three I/O memory address locations are allocated for the Port C, one each for the Data
Register – PORTC, $15($35), Data Direction Register – DDRC, $14($34), and the Port
C Input Pins – PINC, $13($33). The Port C Input Pins address is read only, while the
Data Register and the Data Direction Register are read/write.
All port pins have individually selectable pull-up resistors. The Port C output buffers can
sink 20 mA and thus drive LED displays directly. When pins PC0 to PC5 are used as
inputs and are externally pulled low, they will source current if the internal pull-up resis-
tors are activated.
Port C has an alternate function as analog inputs for the ADC. If some Port C pins are
configured as outputs, it is essential that these do not switch when a conversion is in
progress. This might corrupt the result of the conversion.
During Power-down mode, the Schmitt triggers of the digital inputs are disconnected.
This allows an analog voltage close to V
CC
/2 to be present during Power-down without
causing excessive power consumption.
DATA BUS
D
D
Q
Q
RESET
RESET
C
C
WD
WP
RD
MOS
PULL-
UP
PB5
R
R
WP:
WD:
RL:
RP:
RD:
SPE:
MSTR
WRITE PORTB
WRITE DDRB
READ PORTB LATCH
READ PORTB PIN
READ DDRB
SPI ENABLE
MASTER SELECT
DDB5
PORTB5
SPE
MSTR
SPI CLOCK
OUT
SPI CLOCK
IN
RL
RP