Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview
- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents
74
AT90S/LS4433
1042G–AVR–09/02
controlled by DDB2. When the pin is forced to be an input, the pull-up can still be con-
trolled by the PORTB2 bit. See the description of the SPI port for further details.
• OC1 – Port B, Bit 1
OC1, Output Compare Match output: PB1 pin can serve as an external output for the
Timer/Counter1 Output Compare. The pin has to be configured as an output (DDB1 set
[one]) to serve this function. See the timer description on how to enable this function.
The OC1 pin is also the output pin for the PWM mode timer function.
• ICP – Port B, Bit 0
ICP, Input Capture Pin: PB0 pin can serve as an external input for the Timer/Counter1
input capture. The pin has to be configured as an input (DDB0 cleared [zero]) to serve
this function. See the timer description on how to enable this function.
Figure 50. Port B Schematic Diagram (Pin PB0)
DATA BUS
D
D
Q
Q
RESET
RESET
C
C
WD
WP
RD
MOS
PULL-
UP
PB0
R
R
WP:
WD:
RL:
RP:
RD:
ACIC:
ACO:
WRITE PORTB
WRITE DDRB
READ PORTB LATCH
READ PORTB PIN
READ DDRB
COMPARATOR IC ENABLE
COMPARATOR OUTPUT
DDB6
PORTB0
NOISE CANCELER EDGE SELECT ICF1
ICNC1 ICES1
0
1
ACIC
ACO
RL
RP