Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
 
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
 
- Sleep Modes
 
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents

72
AT90S/LS4433
1042G–AVR–09/02
I/O Ports All AVR ports have true Read-Modify-Write functionality when used as general digital
I/O ports. This means that the direction of one port pin can be changed without uninten-
tionally changing the direction of any other pin with the SBI and CBI instructions. The
same applies for changing drive value (if configured as output) or enabling/disabling of
pull-up resistors (if configured as input).
Port B Port B is a 6-bit bi-directional I/O port.
Three I/O memory address locations are allocated for the Port B, one each for the Data
Register – PORTB, $18($38), Data Direction Register – DDRB, $17($37), and the Port
B Input Pins – PINB, $16($36). The Port B Input Pins address is read only, while the
Data Register and the Data Direction Register are read/write.
All port pins have individually selectable pull-up resistors. The Port B output buffers can
sink 20 mA and thus drive LED displays directly. When pins PB0 to PB7 are used as
inputs and are externally pulled low, they will source current if the internal pull-up resis-
tors are activated.
The Port B pins with alternate functions are shown in Table 23.
When the pins are used for the alternate function, the DDRB and PORTB Registers
have to be set according to the alternate function description.
Port B Data Register – PORTB
Port B Data Direction Register
– DDRB
Port B Input Pins Address –
PINB
Table 23. Port B Pin Alternate Functions
Port Pin Alternate Functions
PB0 ICP (Timer/Counter1 Input Capture Pin)
PB1 OC1 (Timer/Counter1 Output Compare Match Output)
PB2 SS
(SPI Slave Select Input)
PB3 MOSI (SPI Bus Master Output/Slave Input)
PB4 MISO (SPI Bus Master Input/Slave Output)
PB5 SCK (SPI Bus Serial Clock)
Bit 76543210
$18 ($38)
––PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 PORTB
Read/Write R R R/W R/W R/W R/W R/W R/W
InitialValue00000000
Bit 76543210
$17 ($37) ––DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 DDRB
Read/Write R R R/W R/W R/W R/W R/W R/W
InitialValue00000000
Bit 76543210
$16 ($36) ––PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 PINB
Read/Write R R R RRRRR
Initial Value 0 0 N/A N/A N/A N/A N/A N/A










