Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview
- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents
5
AT90S/LS4433
1042G–AVR–09/02
Pin Descriptions
VCC Supply voltage.
GND Ground.
Port B (PB5..PB0) Port B is a 6-bit bi-directional I/O port with internal pull-up resistors. The Port B output
buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated.
Port B also serves the functions of various special features of the AT90S4433 as listed
on page 73.
The Port B pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
Port C (PC5..PC0) Port C is a 6-bit bi-directional I/O port with internal pull-up resistors. The Port C output
buffers can sink 20 mA. As inputs, Port C pins that are externally pulled low will source
current if the pull-up resistors are activated. Port C also serves as the analog inputs to
the A/D Converter.
The Port C pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port D output
buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source
current if the pull-up resistors are activated.
Port D also serves the functions of various special features of the AT90S4433 as listed
on page 81.
The Port D pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
RESET
Reset input. An External Reset is generated by a low level on the RESET pin. Reset
pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter
pulses are not guaranteed to generate a reset.
XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit
XTAL2 Output from the inverting oscillator amplifier
AVCC AVCC is the supply voltage for Port A and the A/D Converter. If the ADC is not used,
this pin must be connected to V
CC
. If the ADC is used, this pin should be connected to
V
CC
via a low-pass filter. See page 64 for details on operation of the ADC.
AREF AREF is the analog reference input for the A/D Converter. For ADC operations, a volt-
age in the range 2.0V to AVCC must be applied to this pin.
AGND If the board has a separate analog ground plane, this pin should be connected to this
ground plane. Otherwise, connect to GND.