Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview
- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents
37
AT90S/LS4433
1042G–AVR–09/02
Timer/Counter1 Control
Register A – TCCR1A
• Bits 7, 6 – COM11, COM10: Compare Output Mode1, Bits 1, and 0
The COM11 and COM10 control bits determine any output pin action following a
Compare Match in Timer/Counter1. Any output pin actions affect pin OC1 (Output
Compare pin 1). This is an alternative function to an I/O port, and the corresponding
direction control bit must be set (one) to control an output pin. The control configuration
is shown in Table 10.
In PWM mode, these bits have a different function. Refer to Table 11 for a detailed
description.
• Bits 5..2 – Res: Reserved Bits
These bits are reserved bits in the AT90S4433 and always read as zero.
• Bits 1, 0 – PWM11, PWM10: Pulse Width Modulator Select Bits
These bits select PWM operation of Timer/Counter1 as specified in Table 11. This mode
is described on page 41.
Bit 7 6 5 4 3 2 1 0
$2F ($4F) COM11 COM10 ––––PWM11 PWM10 TCCR1A
Read/Write R/W R/W R R R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 10. Compare 1 Mode Select
COM11 COM10 Description
0 0 Timer/Counter1 disconnected from output pin OC1
0 1 Toggle the OC1 output line.
1 0 Clear the OC1 output line (to zero).
1 1 Set the OC1 output line (to one).
Table 11. PWM Mode Select
PWM11 PWM10 Description
0 0 PWM operation of Timer/Counter1 is disabled
0 1 Timer/Counter1 is an 8-bit PWM
1 0 Timer/Counter1 is a 9-bit PWM
1 1 Timer/Counter1 is a 10-bit PWM