Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
 
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
 
- Sleep Modes
 
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents

33
AT90S/LS4433
1042G–AVR–09/02
Timer/Counters The AT90S4433 provides two general purpose Timer/Counters – one 8-bit T/C and one
16-bit T/C. Timer/Counters0 and 1 have individual prescaling selection from the same
10-bit prescaling timer. These Timer/Counters can either be used as a Timer with an
internal clock time base or as a counter with an external pin connection that triggers the
counting.
Timer/Counter Prescaler Figure 30. Prescaler for Timer/Counter0 and 1
For Timer/Counters0 and 1, the four different prescaled selections are CK/8, CK/64,
CK/256, and CK/1024, where CK is the Oscillator clock. For the two Timer/Counters0
and 1, external source and stop can also be selected as clock sources.
8-bit Timer/Counter0 The 8-bit Timer/Counter0 can select clock source from CK, prescaled CK or an external
pin. In addition, it can be stopped as described in the specification for the
Timer/Counter0 Control Register (TCCR0). The Overflow Status Flag is found in the
Timer/Counter Interrupt Flag Register (TIFR). Control signals are found in the
Timer/Counter0 Control Register (TCCR0). The interrupt enable/disable settings for
Timer/Counter0 are found in the Timer/Counter Interrupt Mask Register (TIMSK).
When Timer/Counter0 is externally clocked, the external signal is synchronized with the
Oscillator frequency of the CPU. To assure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 8-bit Timer/Counter0 features both a high resolution and a high-accuracy usage
with the lower prescaling opportunities. Similarly, the high prescaling opportunities make
the Timer/Counter0 useful for lower speed functions or exact timing functions with infre-
quent actions. Figure 31 shows the block diagram for Timer/Counter0.
TCK1
TCK0










