Manual
Table Of Contents
- Features
- Pin Configurations
- Description
- Architectural Overview- General Purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- SRAM Data Memory
- Program and Data Addressing Modes- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
 
- EEPROM Data Memory
- Memory Access Times and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling- Reset Sources
- Power-on Reset
- External Reset
- Brown-out Detection
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt Flag Register – TIFR
- External Interrupts
- Interrupt Response Time
- MCU Control Register – MCUCR
 
- Sleep Modes
 
- Timer/Counters
- 16-bit Timer/Counter1
- Watchdog Timer
- EEPROM Read/Write Access
- Serial Peripheral Interface – SPI
- UART
- Analog Comparator
- Analog-to-Digital Converter
- I/O Ports
- Memory Programming
- Electrical Characteristics
- External Clock Drive Waveforms
- Typical Characteristics
- Register Summary
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Errata for AT90S/LS4433 Rev. Rev. C/D/E/F
- Data Sheet ChangeLog for AT90S/LS4433
- Table of Contents

25
AT90S/LS4433
1042G–AVR–09/02
Brown-out Detection AT90S4433 has an On-chip Brown-out Detection (BOD) circuit for monitoring the V
CC
level during the operation. The power supply must be decoupled with a 47 nF to 100 nF
capacitor if the BOD function is used. The BOD circuit can be enabled/disabled by the
fuse BODEN. When BODEN is enabled (BODEN programmed), and V
CC
decreases to a
value below the trigger level, the Brown-out Reset is immediately activated. When V
CC
increases above the trigger level, the Brown-out Reset is deactivated after a delay. The
delay is defined by the user in the same way as the delay of POR signal (see Table 5).
The trigger level for the BOD can be selected by the fuse BODLEVEL to be 2.7V
(BODLEVEL unprogrammed), or 4.0V (BODLEVEL programmed). The trigger level has
a hysteresis of 50 mV to ensure spike-free Brown-out Detection.
The BOD circuit will only detect a drop in V
CC
if the voltage stays below the trigger level
for longer than 3 µs for trigger level 4.0V, 7 µs for trigger level 2.7V (typical values).
Figure 28. Brown-out Reset during Operation
Watchdog Reset When the Watchdog times out, it will generate a short reset pulse of one XTAL cycle
duration. On the falling edge of this pulse, the delay timer starts counting the Time-out
period (t
TOUT
). See page 43 for details on operation of the Watchdog.
Figure 29. Watchdog Reset during Operation
VCC
RESET
TIME-OUT
INTERNAL
RESET
V
BOT-
V
BOT+
t
TOUT










