Manual

135
AT89C5131
4136A–USB–03/03
Table 85. USBIEN Register
USBIEN (S:BEh)
USB Global Interrupt Enable Register
Reset Value = 10h
Table 86. USBADDR Register
USBADDR (S:C6h)
USB Address Register
Reset Value = 80h
76543210
- - EWUPCPU EEORINT ESOFINT - - ESPINT
Bit Number Bit Mnemonic Description
7-6 -
Reserved
The value read from these bits is always 0. Do not set these bits.
5EWUPCPU
Enable Wake Up CPU Interrupt
Set this bit to enable Wake Up CPU Interrupt. (See “USBIEN Register
USBIEN (S:BEh) USB Global Interrupt Enable Register” on page 135)
Clear this bit to disable Wake Up CPU Interrupt.
4EEOFINT
Enable End Of Reset Interrupt
Set this bit to enable End Of Reset Interrupt. (See “USBIEN Register USBIEN
(S:BEh) USB Global Interrupt Enable Register” on page 135). This bit is set
after reset.
Clear this bit to disable End Of Reset Interrupt.
3ESOFINT
Enable SOF Interrupt
Set this bit to enable SOF Interrupt. (See “USBIEN Register USBIEN (S:BEh)
USB Global Interrupt Enable Register” on page 135).
Clear this bit to disable SOF Interrupt.
2-1 -
Reserved
The value read from these bits is always 0. Do not set these bits.
0ESPINT
Enable Suspend Interrupt
Set this bit to enable Suspend Interrupts (see the “USBIEN Register USBIEN
(S:BEh) USB Global Interrupt Enable Register” on page 135).
Clear this bit to disable Suspend Interrupts.
76543210
FEN UADD6 UADD5 UADD4 UADD3 UADD2 UADD1 UADD0
Bit Number
Bit
Mnemonic Description
7FEN
Function Enable
Set this bit to enable the function. FADD is reset to 1.
Cleared this bit to disable the function.
6-0 UADD[6:0]
USB Address
This field contains the default address (0) after power-up or USB bus reset.
It will be written with the value set by a SET_ADDRESS request received by the
device firmware.