Manual

42
AT86RF401
1424D–RKE–09/02
Button Detect Register – B_DET
• Bits[7:6]
Reserved. These bits read “0”.
• Bits[5:0]
When an I/O pin is configured as a button using the IO_ENAB and IO_DATOUT regis-
ters and a logic low is detected on that pin, the button detect logic is activated. If the part
is in sleep mode, the part responds as described in the Power Control Register descrip-
tion. If a good battery is present, the appropriate bit is set in this register. A bit in this
register is cleared by writing a “0” to it.
Battery Low Configuration Register – BL_CONFIG
• Bit[7]: Battery Low
When Bit 6 in this register is set (Battery Low Valid), the BL (Battery Low) bit indicates
that the battery voltage is lower than the voltage level that is determined by Bits [5:0] of
this register.
• Bit[6]: Battery Low Valid
When the Battery Low Configuration Register is written, this bit is set to “0”. When the
battery voltage has been sampled and compared to the voltage determined by the BLx
bits, this bit is set to “1” indicating that the data in Bit 7 (Battery Low) is valid. This can
take up to 3100 XTAL cycles to complete.
• Bit[5:0]: Battery Low Detection Level
This value is sent to the battery monitor. The threshold is calculated using the formulas
shown in Table 3 (page 10).
Bit 76543210
$34 ––BD5 BD4 BD3 BD2 BD1 BD0
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value 00000000
Bit 76543210
$35 BL BLV BL5 BL4 BL3 BL2 BL1 BL0
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value 00000000