User Manual

87
8111A–AVR–05/08
AT86RF231
8.2.5 Register Description
Register 0x04 (TRX_CTRL_1):
The TRX_CTRL_1 register is a multi purpose register to control various operating modes and
settings of the radio transceiver.
• Bit 7 - PA_EXT_EN
Refer to Section 11.5 “RX/TX Indicator” on page 147.
• Bit 6 - IRQ_2_EXT_EN
Refer to Section 11.6 “RX Frame Time Stamping” on page 150.
• Bit 5 - TX_AUTO_CRC_ON
Register bit TX_AUTO_CRC_ON controls the automatic FCS generation for TX operations. The
automatic FCS algorithm is performed autonomously by the radio transceiver if register bit
TX_AUTO_CRC_ON = 1.
• Bit 4 - RX_BL_CTRL
Refer to Section 11.7 “Frame Buffer Empty Indicator” on page 152.
• Bit [3:2] - SPI_CMD_MODE
Refer to Section 6.3 “Radio Transceiver Status information” on page 24.
• Bit 1 - IRQ_MASK_MODE
Refer to Section 6.6 “Interrupt Logic” on page 29.
• Bit 0 - IRQ_POLARITY
Refer to Section 6.6 “Interrupt Logic” on page 29.
Register 0x06 (PHY_RSSI):
The PHY_RSSI register is a multi purpose register that indicates FCS validity, provides random
numbers and shows the actual RSSI value.
Bit 7 6 5 4 3 2 1 0
+0x04 PA_EXT_EN IRQ_2_EXT_EN TX_AUTO_CRC_ON RX_BL_CTRL SPI_CMD_MODE IRQ_MASK_MODE IRQ_POLARITY TRX_CTRL_1
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Reset Value 0 0 1 0 0 0 0 0
Bit 7 6 5 43210
+0x06 RX_CRC_VALID RND_VALUE RSSI PHY_RSSI
Read/Write R R R RRRRR
Reset Value 0 0 0 0 0 0 0 0