User Manual

8
8111A–AVR–05/08
AT86RF231
1.3.3 Register Description
Register 0x03 (TRX_CTRL_0):
The TRX_CTRL_0 register controls the drive current of the digital output pads and the CLKM
clock rate.
• Bit [7:6] - PAD_IO
The register bits set the output driver current of all digital output pads, except CLKM.
Note: 1. Reset values of register bits are underlined characterized in the document.
• Bit [5:6] - PAD_IO_CLKM
The register bits set the output driver current of pin CLKM. Refer also to Section 9.6 “Crystal
Oscillator (XOSC)” on page 116.
• Bit 3 - CLKM_SHA_SEL
Refer to Section 9.6 “Crystal Oscillator (XOSC)” on page 116.
• Bit [2:0] - CLKM_CTRL
Refer to Section 9.6 “Crystal Oscillator (XOSC)” on page 116.
Bit 7 6 5 4 3 2 1 0
PAD_IO PAD_IO_CLKM CLKM_SHA_SEL CLKM_CTRL TRX_CTRL_0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 1 1 0 0 1
Table 1-5. Digital Output Driver Strength
Register Bit Value Description
PAD _I O 0
(1)
2 mA
14 mA
26 mA
38 mA
Table 1-6. CLKM Driver Strength
Register Bit Value Description
PAD_IO_CLKM 0 2 mA
1 4 mA
26 mA
38 mA