User Manual

103
8111A–AVR–05/08
AT86RF231
9.1.4 Register Description
Register 0x15 (RX_SYN):
This register controls the sensitivity threshold of the receiver.
Bit 7 - RX_PDT_DIS
RX_PDT_DIS = 1 prevents the reception of a frame even if the radio transceiver is in receive
modes. An ongoing frame reception is not affected. This operation mode is independent of the
setting of register bits RX_PDT_LEVEL.
Bit [6:4] - Reserved
Bit [3:0] - RX_ PDT_LEVEL
These register bits desensitize the receiver such that frames with an RSSI level below the
RX_PDT_LEVEL threshold level (if RX_PDT_LEVEL > 0) are not received. The threshold level
can be calculated according to the following formula:
RX_THRES = RSSI_BASE_VAL + 3 * (RX_PDT_LEVEL -1), for RX_PDT_LEVEL > 0
Examples for certain register settings are given in Table 9-1 on page 103
If register bits RX_PDT_LEVEL > 0 the current consumption of the receiver in states RX_ON
and RX_AACK_ON is reduced by 500 µA, refer to Section 12.8 “Current Consumption Specifi-
cations” on page 161 parameter 12.8.3.
If register bits RX_PDT_LEVEL = 0 (reset value) all frames with a valid SHR and PHR are
received, independently of their signal strength.
Bit 76 543 2 1 0
+0x15 RX_PDT_DIS Reserved RX_PDT_LEVEL RX_SYN
Read/Write R/W R R R R/W R/W R/W R/W
Reset Value 00 000 0 0 0
Table 9-1. Receiver Desensitization Threshold Level - RX_PDT_LEVEL
Value [Register] RX Input Threshold Level Value [dBm]
0x0
<= RSSI_BASE_VAL (reset value) RSSI value not considered
0x1 > RSSI_BASE_VAL + 0 * 3 > -90
...
0xE > RSSI_BASE_VAL + 13 * 3 > -51
0xF > RSSI_BASE_VAL + 14 * 3 > -48