Manual

AT86RF230

5131A-ZIGB-06/14/06

Bit Field Name Reset R/W Comments

7:4 CCA_CS_THRES 12 R/W Threshold for CCA_CS

3:0 CCA_ED_THRES 7 R/W An ED value above the threshold signals a busy channel during a

CCA_ED measurement.

Table 8-9. 0x09 - CCA_THRES

Note: CCA_ED_THRES: The CCA_ED request will indicate a busy channel, if the measured receive power

is above -91 dBm + 2*CCA_ED_THRES[dB].

Bit Field Name Reset R/W Comments

7:0 IRQ_MASK 255 R/W Mask register for IRQs.

If bit is set to high, then the IRQ is enabled.

If bit is set to low, then the IRQ is disabled.

IRQ_MASK[7] corresponds to IRQ_7.

IRQ_MASK[0] corresponds to IRQ_0.

Table 8-10. 0x0E - IRQ_MASK

Note: The occurrence of an interrupt will be signaled over the IRQ wire.

Bit Field Name Reset R/W Comments

7 IRQ_7 0 R BAT_LOW: signals low battery

6 IRQ_6 0 R TRX_UR: signals a FIFO underrun

5 IRQ_5 0 R Reserved

4 IRQ_4 0 R Reserved

3 IRQ_3 0 R TRX_END: signals end of frame (transmit and receive)

2 IRQ_2 0 R RX_START: signals beginning of receive frame

1 IRQ_1 0 R PLL_UNLOCK: PLL goes from lock to unlock state

0 IRQ_0 0 R PLL_LOCK: PLL goes from unlock to lock state

Table 8-11. 0x0F - IRQ_STATUS

Note: The occurrence of an interrupt will be signaled over the IRQ wire. A read access will reset the

interrupt bits.

Bit Field Name Reset R/W Comments

7 AVREG_EXT 0 R/W 1’d0: use internal analog voltage regulator

1’d1: use external voltage regulator

6 AVDD_OK 0 R 1’d0: analog voltage regulator is disabled

1’d1: internal analog voltage is correct and stable

5:4 AVREG_TRIM 0 R/W Controls the voltage of the analog voltage regulator.

2’d0: 1.80V

2’d1: 1.75V

2’d2: 1.84V

2’d3: 1.88V