Manual

33
AT86RF230
5131A-ZIGB-06/14/06
Bit Field Name Reset R/W Comments
7:5 TRAC_STATUS 0 R 3’d0: SUCCESS
3’d3: CHANNEL_ACCESS_FAILURE
3’d5: NO_ACK
All other values are reserved.
4:0 TRX_CMD 0 R/W Transceiver control commands:
5’d0: NOP
5’d2: TX_START
5’d3: FORCE_TRX_OFF
5’d6: RX_ON
5’d8: TRX_OFF (CLK Mode)
5’d9: PLL_ON (TX_ON)
5’d22: RX_AACK_ON
5’d25: TX_ARET_ON
All other values are mapped to NOP.
Table 8-3. 0x02 - TRX_STATE
Note: TRX_CMD = “0” after power on reset (POR).
Frame transmission starts 16 µs after TX_START command.
Bit Field Name Reset R/W Comments
7:6 PAD_IO 0 R/W Set the output driver current of digital pads (except CLKM pad).
2’d0: 2 mA
2’d1: 4 mA
2’d2: 6 mA
2’d3: 8 mA
5:4 PAD_IO_CLKM 1 R/W Set the output driver current of CLKM.
2’d0: 2 mA
2’d1: 4 mA
2’d2: 6 mA
2’d3: 8 mA
3 CLKM_SHA_SEL 1 R/W Shadow the CLKM_CTRL clock changes. If the mode is enabled,
changes to the CLKM_CTRL bits take effect only when the IC leaves
the SLEEP mode.
1’d0: disable (on the fly)
1’d1: enable (shadow)
2:0 CLKM_CTRL 1 R/W Controls the clock frequency at the CLKM pad.
3’d0: no clock
3’d1: 1 MHz
3’d2: 2 MHz
3’d3: 4 MHz
3’d4: 8 MHz
3’d5: 16 MHz
3’d6: no clock
3’d7: no clock
Table 8-4. 0x03 - TRX_CTRL_0