Manual

32
AT86RF230
5131A-ZIGB-06/14/06
Reg.-Addr. Register Name Description
0x29 IEEE_ADDR_5 Current node IEEE address for address recognition
0x2A IEEE_ADDR_6 Current node IEEE address for address recognition
0x2B IEEE_ADDR_7 Current node IEEE address for address recognition
0x2C XAH_CTRL Retries value control
0x2D CSMA_SEED_0 CSMA seed value
0x2E CSMA_SEED_1 CSMA seed value
Table 8-1. Configuration registers overview
Bit Field Name Reset R/W Comments
7 CCA_DONE 0 R 1’d0: CCA calculation in progress
1’d1: CCA calculation done
6 CCA_STATUS 0 R Indicates an idle channel from CCA module.
CHANNEL_IDLE:
1’d0: channel is busy
1’d1: channel is idle
5 0 R Reserved
4:0 TRX_STATUS 0 R Signals the current transceiver status.
TRANSCEIVER_STATUS:
5’d0: P_ON
5’d1: BUSY_RX
5’d2: BUSY_TX
5’d6: RX_ON
5’d8: TRX_OFF (CLK Mode)
5’d9: PLL_ON (TX_ON)
5’d15: SLEEP
5’d17: BUSY_RX_AACK
5’d18: BUSY_TX_ARET
5’d22: RX_AACK_ON
5’d25: TX_ARET_ON
5’d28: RX_ON_NOCLK
5’d29: RX_AACK_ON_NOCLK
5’d30: BUSY_RX_AACK_NOCLK
5’d31: state transition
Table 8-2. 0x01 - TRX_STATUS
Note: A register read will reset the CCA_STATUS bit and the CCA_DONE bit if a CCA calculation was done
(CCA_DONE = 1).