Manual

28
AT86RF230
5131A-ZIGB-06/14/06
7.4. Frame Receive Procedure
The following transactions are required to receive a frame over the SPI:
IRQ issued
read IRQ status register (register access)
IRQ line deasserted
receiving frame data (frame receive mode)
PHY
Controller
Figure 7-8. Receive Frame Transactions Between AT86RF230 and Controller
CLKM
SEL
SCLK
MOSI
MISO
IRQ
SLP_TR
COMMAND
XX
COMMAND
XX XX XX XX XX XX
XX
READ DATA
XX
FRAME LENGTH
FRAME DATA 1 FRAME DATA 2 FRAME DATA 3
FRAME DATA n
LQI Value
IRQ issued
IRQ_status_read Frame_upload
Figure 7-9. Frame Receive Sequence
7.5. Frame Transmit Procedure
The following transactions are required to transmit a frame over SPI:
write frame data to transceiver (frame transmit mode)
write tx_start bit to register (register access) or assert SLP_TR
(depends on configuration)
PHY
Controller
Figure 7-10. Transmit Frame Transactions Between AT86RF230 and Controller