User guide

63
7511B–SCR–10/05
AT83C26
Reset value = 0x 1111 1111
Table 45. SLEW_CTRL_2 (Slew control for SC3 and SC4)
7 6 5 4 3 2 1 0
CCLK4_SLEW_CTR
L1
CCLK4_SLEW_CT
RL0
CIO4_SLEW_CT
RL1
CIO4_SLEW_CT
RL0
CCLK3_SLEW_CTR
L1
CCLK3_SLEW_CTRL
0
CIO3_SLEW_CT
RL1
CIO3_SLEW_CTR
L0
Bit Number Bit Mnemonic Description
7-6
CCLK4_SLEW_CTRL[1-0]
0 0: Mode 1 (optimum for CVCC4=5V)
0 1: Mode 2 (optimum for CVCC4=3V)
1 0: Mode 3 (optimum for CVCC4=1.8V)
1 1: Automatic mode
The reset value is 11.
5-4
CIO4_SLEW_CTRL[1-0]
0 0: Mode 1 (optimum for CVCC4=5V)
0 1: Mode 2 (optimum for CVCC4=3V)
1 0: Mode 3 (optimum for CVCC4=1.8V)
1 1: Automatic mode
The reset value is 11.
3-2
CCLK3_SLEW_CTRL[1-0]
0 0: Mode 1 (optimum for CVCC3=5V)
0 1: Mode 2 (optimum for CVCC3=3V)
1 0: Mode 3 (optimum for CVCC3=1.8V)
1 1: Automatic mode
The reset value is 11.
1-0
CIO3_SLEW_CTRL[1-0]
0 0: Mode 1 (optimum for CVCC3=5V)
0 1: Mode 2 (optimum for CVCC3=3V)
1 0: Mode 3 (optimum for CVCC3=1.8V)
1 1: Automatic mode
The reset value is 11.