Owner's manual
Table Of Contents
- Features
- Description
- Applications
- Specifications
- Power Consumption and DC Characteristics
- Switching Performances
- Timing Diagrams: Slow and Fast SPI Interface
- Functional Description
- Sensor and Block Diagram
- Function Registers
- SPI Interface General Description
- Control Interface (Slow SPI)
- Image Capture (Fast SPI)
- Navigation (Slow SPI)
- Temperature Stabilization Function and Watchdog
- Power Management
- Packaging Mechanical Data
- Ordering Information
- Appendix A
- Appendix B
- Appendix C
- Appendix D
6
AT77C104B
5347B–BIOM–08/04
Note: 1. A minimum noise margin of 0.05 V
DD
should be taken for Schmitt trigger input threshold switching levels compared to V
IL
and V
IH
values.
I
IOZ
Tri-state output leakage without
pull-up/down device
(1)
V
I
= 0V or V
DD
IV 1 µA
V
IL
Low level input voltage
(1)
I0.3 V
DD
(1)
V
V
IH
High level input voltage
(1)
I0.7 V
DD
(1)
V
V
HYST
Schmitt trigger hysteresis
(1)
V
DD
= 3.3V
Tem p = 25 ° C
IV 0.400 0.750 V
Table 9. Digital Outputs
Logic Compatibility CMOS
Name Parameter Conditions Test Level Min Typ Max Unit
V
OL
Low level output voltage
I
OL
= 3 mA
V
DD
= 3.3V ±10%
I
0.15 V
DD
(1)
V
I
OL
= 1.75 mA
V
DD
= 2.5V ±5%
V
OH
High level output voltage
I
OH
= -3 mA
V
DD
= 3.3V ±10%
I0.85 V
DD
V
I
OH
= -1.75 mA
V
DD
= 2.5V ±5%
Table 8. Digital Inputs
Logic Compatibility CMOS