Owner manual

73
AT76C551
1612D–08/01
Timer Prescale Register
R/W 16 bits
Timer Prescale Register sets the divisor for the prescale circuit. If Timer Prescale Register
contains p and PAI clock frequency is f (MHz) then countdown rate for the Timer Device
counter will be r = f/p
Note: The Timer Prescale Register must contain a non-zero value for proper Timer Device operation.
Timer Control Register
R/W 16 bits
• Bits 15..2 – Reserved
Returns 0 when read
• Bit 1 – Enable
Logic 1: The counter is allowed to run.
Logic 0: The counter is stopped. The Timer Device may be configured via Timer Preload Low
Register, Timer Preload High Register and Timer Prescale Register.
• Bit 0 – Periodic
Logic 1: Periodic mode operation is selected.
Logic 0: One-shot mode operation is selected.
Timer Interrupt Clear Register
W16 bits
Writing Timer Interrupt Clear Register with any value clears an interrupt generated by the
Timer Device.
AT76C551 firmware is expected to write to Timer Interrupt Clear Register each time a Timer
Device interrupt is processed or else, interrupt request to the ARM core will persist.