Owner manual

70
AT76C551
1612D–08/01
General
Purpose
Registers
Power Down
addr: D00000 hex R/W 6 bits
• Bit 5 – VCPU: VC Power Up
• Bit 4 – UARTPU: UART Power Up
• Bit 3 – USBPU: USB Power Up
• Bit 2 – BDPRPD: BT Baseband Power Down
• Bit 1 – Reserved
• Bit 0 – ARMSPD: ARM Speed
Note: Default Value: 00 hex
Module Reset
addr: D00004 hex R/W 5 bits
• Bit 4 – PCMCIARES: PCMCIA Core Reset
• Bit 3 – USBRES: USB Reset
• Bit 2 – VCRES: VC Reset
• Bit 1 – UARTRES: UART Reset
• Bit 0 – BTRES: BT Baseband Reset
Note: Default Value: 00 hex
USB Pad Enable
addr: D00008 hex R/W 1 bit
•
Bit 2 – USBPDEN: USB Pad Enable
Note: Default Value: 0
DEBUG Port
addr: D0000C hex R/W 1 bit
• Bit 9 – BTRXDB
When enabled, the output of the BT clock recovery circuit is transferred to the Debug pins.
• Bit 8 DBEN: Debug TX Enable
• Bit 7..0 – DBDATA: Debug Data
Interrupt
Controller
Registers
Interrupt Status Register
addr: F00000 hex R 8 bits
• Bit 7 – VC: Voice Codec Interrupt
• Bit 6 – PCMCIA:PCMCIA Interrupt
• Bit 5 – UART: UART Interrupt
• Bit 4 – USB: USB Interrupt
• Bit 3 – BDPR: Baseband DPRAM Interrupt
• Bit 2 – BT: Baseband and Timers Interrupt
• Bit 1 – TM1: Timer 1 Interrupt
• Bit 0 – TM2: Timer 2 Interrupt
Note: Default Value: 00 hex