Owner manual

52
AT76C551
1612D–08/01
SLP_MD_EN: Sleep Mode Control
addr 5000000h R/W 8 bits
• Bits 7..6 – Reserved
• Bit 5 – SLP
Put the USB module in sleep mode
• Bits 4..0 – Reserved
Note: Default: 00h
GLB_IRQ_MSK: Global Interrupt Master Register
addr 5000004h R/W 16 bits
• Bits 15..11 – Reserved
• Bit 10 – TDMA_IEN:Transmit DMA Interrupt Enable
• Bit 9 – RDMA_IEN: Receive DMA Interrupt Enable
• Bit 8 – URES_INT
When this bit is high, the USB reset interrupts are enabled
• Bit 7 – Reserved
• Bit 6 – INT_EN
When this bit is high, it allows the INTERRUPT line from the USB protocol handler to cause
interrupts
• Bits 5..2 – Reserved
• Bit 1 – SUSP_INT
If this bit is high, an interrupt is generated when the USB enters suspend mode.
• Bit 0 – RSM_INT
If this bit is high, an interrupt is generated when the USB enters resume mode.
Note: Default: 00h
These registers allow interrupt masking for the following interrupt sources:
1. INTERRUPT line from USB protocol handler.
2. USB reset (USB_RES). A USB reset signal is asserted from USB protocol handler
when the USB host requests it by forcing both the differential USB network signals to
low level.
3. Suspend: A USB device enters in suspend only when requested by the USB host
through bus inactivity for at least 3 ms.
4. Resume: a J to K state change on the USB port signals resume.
IRQ_STAT: Master Interrupt Status
addr 5000008h R 16 bits
• Bits 15..11 – Reserved
• Bit 10 – TDMA_TC: Transmit DMA Complete
• Bit 9 – RDMA_TC: Receive DMA Complete
• Bit 8 – SUS_RES_ST
Indicates the current status of the USB block. When this bit is high, the USB is in Suspend
mode while, when low, the USB has resumed.
• Bit 7 – Reserved