Owner manual

AT76C551

1612D–08/01

RSSI_CtrlStatus

addr: 600014 hex R/W 32 bits

• Bits 31..16 – Reserved

• Bits 15..8 R – ADC data

Result of last conversion (last RSSI value sampled)

• Bit 7 – R ADC Status

Set by hardware when conversion procedure has been completed

• Bits 6..4 – Reserved

• Bits 3..2 W – ADC Mode

00: ADC idle

01: One shot conversion

10: Continuous conversion

• Bit 1 – W ADC Start

Set by firmware to start a conversion procedure when ADC mode is “one shot conversion”

(auto-clear).

• Bit 0 – W ADC Power

0: ADC off

1: ADC on

Note: Default Value: 0000 hex

Controlstatus1

addr: 600018 hex R/W 32 bits

• Bits 31..19 – Reserved

• Bits 18..9 – Packet_header

Sets packet header before packet TX.

Gets packet header after packet header RX during packet RX.

• Bits 8..0 – Payload_length

Sets payload body length before data packet TX

Gets payload body length after payload header RX during packet RX

Note: Default Value: 00000000 hex

CtrlStatus2

addr: 60001C hex R/W 32 bits

• Bits 31..20 – Reserved

• Bit 19 R – AccCodeBusy

Set by hardware during access code calculation or transmission

• Bit 18 R – CipherBusy

Set by hardware during ciphering/deciphering

• Bit 17 R – E_funBusy

Set by hardware during E_function calculation