Owner manual

28
AT76C551
1612D–08/01
SIR12 – MR4: Mirror Register 4
PCMCIA addr: 0011 hex R 8 bits
• Bits 7..0 – MR4[7:0]
Note: Default Value: 00 hex – The host can only read MR4. MR4 bits 7..0 reflect bits 15..8 of MIR1,
which can be written by the ARM core.
SIR13 – MR5: Mirror Register 5
PCMCIA addr: 0012 hex R 8 bits
• Bits 7..0 – MR5[7:0]
The host can only read MR5. MR5 bits 7..0 reflect bits 7..0 of MIR2, which can be written by
the ARM core.
Note: Default Value: 00 hex
SIR14 – MR6: Mirror Register 6
PCMCIA addr: 0013 hex R 8 bits
• Bits 7..0 – MR6[7:0]
The host can only read MR6. MR6 bits 7..0 reflect bits 15..8 of MIR2, which can be written by
the ARM core.
Note: Default Value: 00 hex
SIR15 – MR7: Mirror Register 7
PCMCIA addr: 0014 hex R 8 bits
• Bits 7..0 – MR7[7:0]
The host can only read MR7. MR7 bits 7..0 reflect bits 7..0 of MIR3, which can be written by
the ARM core.
Note: Default Value: 00 hex
SIR16 – MR8: Mirror Register 8
PCMCIA addr: 0015 hex R 8 bits
• Bits 7..0 – MR8[7:0]
The host can only read MR8. MR8 bits 7..0 reflect bits 15..8 of MIR3, which can be written by
the ARM core.
Note: Default Value: 00 hex
In general, Mirror Registers provide a means of one-way communication from AT76C551 firm-
ware to the host driver software. See also MIR0 - MIR3.