Manual

AT75C310
53
USART: Universal Synchronous/Asynchronous Receiver/Transmitter
The AT75C310 provides two identical, full-duplex, univer-
sal synchronous/asynchronous receiver/transmitters as
USART A and USART B. These peripherals sit on the APB
bus but are also connected to the ASB bus and thus the
external memory via the PDC.
The main features are:
Programmable baud rate generator
Parity, framing and overrun error detection
Line break generation and detection
Automatic echo, local loopback and remote loopback
channel modes
Multi-drop mode: address detection and generation
Interrupt generation
Two dedicated peripheral data controller channels
5-, 6-, 7-, 8- and 9-bit character length
Modem control and status lines
Figure 9. USART Block Diagram
Peripheral Data Controller
Receiver
Channel
Transmitter
Channel
Control Logic
Interrupt Control
Baud Rate Generator
Receiver
Transmitter
AMBA
ASB
APB
USxIRQ
MCKI
MCKI/8
RXD
TXD
SCK
USART Channel
Baud Rate Clock
PIO:
Parallel
I/O
Controller