AT75C310
104
Figure 23. SPI in Master Mode
0
1
SP_MR(ACLK32)
ACLK
ACLK/32
SPCK Clock Generator
SP_CSRx[15:0]
S
R
Q
M
O
D
F
T
D
R
E
R
D
R
F
O
V
R
E
S
P
I
E
N
S
0
1
SP_MR(PS)
PCS
SP_RDR
Serializer
MISO
SP_MR(PCS)
SPIDIS SPIEN
SP_MR(MSTR)
SP_IER
SP_IDR
SP_IMR
SP_SR
MOSI
NPCS1
NPCSS
LSB
MSB
SPCK
SPIRQ
SPI
Master
Clock
RD
PCS
SP_TDR
TD
