User Manual

AT75C220
9
Memory Map
The memory map is divided into regions of 256 megabytes.
The top memory region (0xF000_0000) is reserved and
subdivided for internal memory blocks or peripherals within
the AT75C220. The device can define up to six other active
external memory regions by means of the static memory
controller and SDRAM memory controller. See Table 2.
The memory map is divided between the two ASB buses.
All regions except the 16 megabytes between
0xFB00_0000 and 0xFBFF_FFFF are located on the ARM
ASB bus. Accesses to locations between 0xFB00_0000
and 0xFBFF_FFFF are routed to the MAC ASB bus.
The memory map assumes default values on reset. Exter-
nal memory regions can be reprogrammed to other base
addresses. For details, see “SMC: Static Memory Control-
ler” on page 16 and “SDMC: SDRAM Controller” on page
24. Note that the internal memory regions have fixed loca-
tions that cannot be reprogrammed.
There are no hardware locks to prevent incorrect program-
ming of the regions. Programming two or more regions to
have the same base address results in undefined behavior.
The ARM reset vector with address 0x00000000 is mapped
to internal ROM or external memory depending on the sig-
nal pin NDSRA/BOOTN. After booting, the ROM region can
be disabled and some external memory such as SDRAM or
Flash can be mapped to the bottom of the memory map by
programming SMC_CS0 or DMC_MR0.
Table 2. AT75C220 Memory Map
Default Base Address Region Type Normal Mode Boot Mode
0xFF000000 Internal APB Bridge
0xFE000000 Internal Reserved
0xFD000000 Internal Oak A Program RAM
(24K x 16 bits)
0xFC000000 Frame Buffer (16K x 16 bits)
0xFB000000 Internal Reserved (MAC ASB Bus)
0xFA000000 Internal Oak A DPMB (256 x 16 bits)
0xF9000000 Internal Boot ROM (1 KB)
0x50000000 External SDMC_CS1
0x40000000 External SDMC_CS0
0x30000000 External SMC_CS3
0x20000000 External SMC_CS2
0x10000000 External SMC_CS1
0x00000000 External/Internal SMC_CS0 Boot ROM
0x000003FF
0x00000000