User Manual

AT75C220
51
AIC: Advanced Interrupt Controller
The AT75C220 integrates the Atmel advanced interrupt
controller (AIC). For details on this peripheral, refer to the
datasheet, literature number 1246.
The interrupt controller is connected to the fast interrupt
request (NFIQ) and the standard interrupt request (NIRQ)
inputs of the ARM7TDMI processor. The processor’s NFIQ
line can only be asserted by the external fast interrupt
request input (FIQ). The NIRQ line can be asserted by the
interrupts generated by the on-chip peripherals and the two
external interrupt request lines, IRQ0 to IRQ1.
An 8-level priority encoder allows the user to define the pri-
ority between the different interrupt sources. Internal
sources are programmed to be level-sensitive or edge-trig-
gered. External sources can be programmed to be positive-
or negative-edge triggered or high- or low-level sensitive.
Figure 13. Advanced Interrupt Controller Block Diagram
Table 17. Interrupt Sources
Interrupt Source Interrupt Name Interrupt Description
0 FIQ Fast Interrupt (LOWP)
1 WDT Watchdog Interrupt
2 SWI Software Interrupt
3 UARTA USART A Interrupt
4 TC0 Timer Channel 0 Interrupt
5 TC1 Timer Channel 1 Interrupt
6 TC2 Timer Channel 2 Interrupt
7 PIOA PIO A Interrupt
8 MACA MAC A Interrupt
9 SPI Serial Peripheral Interface
10 IRQ0 External Interrupt
11 IRQ1 External Interrupt
12 OAKA OAK Semaphore Interrupt
13 MACB MAC B Interrupt
Control
Logic
Memorization
Memorization
Prioritization
Controller
NIRQ
Manager
NFIQ
Manager
FIQ Source
Advanced Peripheral
Bus (APB)
Internal Interrupt Sources
External Interrupt Sources
ARM7TDMI
Core
NFIQ
NIRQ