User Manual

AT75C220
128
SPI Control Register
Register Name:SP_CR
Access Type:Write-only
• SPIEN: SPI Enable
0 = No effect.
1 = Enables the SPI to transfer and receive data.
• SPIDIS: SPI Disable
0 = No effect.
1 = Disables the SPI.
All pins are set in input mode and no data is received or transmitted.
If a transfer is in progress, the transfer is finished before the SPI is disabled.
If both SPIEN and SPIDIS are equal to one when the control register is written, the SPI is disabled.
• SWRST: SPI Software reset
0 = No effect.
1 = Resets the SPI.
A software-triggered hardware reset of the SPI interface is performed.
0x20 SP_RPR Receive Pointer Register Read/write 0
0x24 SP_RCR Receive Counter Register Read/write 0
0x28 SP_TPR Transmit Pointer Register Read/write 0
0x2C SP_TCR Transmit Counter Register Read/write 0
0x30 SP_CSR0 Chip Select Register 0 Read/write 0
0x34 – Reserved ––
0x38 – Reserved ––
0x3C – Reserved ––
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
SWRST –––––SPIDIS SPIEN
Table 27. SPI Memory Map (Continued)
Offset Register Name Register Access Reset Value