Instruction Manual

5
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
Figure 2. Floor Plan (Representative Portion)
(1)
Note: 1. Repeaters regenerate signals and can connect any bus to any other bus (all path-
ways are legal) on the same plane. Each repeater has connections to two adjacent
local-bus segments and two express-bus segments. This is done automatically using
the integrated development system (IDS) tool.
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= Vertical Repeater
= Horizontal Repeater
= Core Cell
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