Instruction Manual

40
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
I/O25 I/O41 I/O55 I/O83 30 40 50 241 Y24
I/O26 I/O42 I/O56 I/O84 31 41 51 240 AA25
GND GND GND
(1)
VCC VCC VCC
(1)
I/O57 I/O85 239 AB25
I/O58 I/O86 238 AA24
I/O87
I/O88
I/O27 I/O43 I/O59 I/O89 27 21 18 28 32 42 52 237 Y23
I/O28 I/O44 I/O60 I/O90 22 19 29 33 43 53 236 AC26
GND
I/O91 AD26
I/O92 AC25
I/O29 I/O45 I/O61 I/O93 30 34 44 54 235 AA23
I/O30 I/O46 I/O62 I/O94 31 35 45 55 234 AB24
I/O31
(OTS)
(3)
I/O47
(OTS
)
(3)
I/O63
(OTS
)
(3)
I/O95
(OTS
)
(3)
28 23 20 32 36 46 56 233 AD25
I/O32,
GCK2
I/O48,
GCK2
I/O64,
GCK2
I/O96,
GCK2
29 24 21 33 37 47 57 232 AC24
M1 M1 M1 M1 30 25 22 34 38 48 58 231 AB23
GND GND GND GND 31 26 23 35 39 49 59 230 GND
(1)
M0 M0 M0 M0 32 27 24 36 40 50 60 229 AD24
AT40K05
AT40K05LV
AT40K10
AT40K10LV
AT4 0 K2 0
AT40K20LV
AT40K40
AT40K40LV Left Side (Top to Bottom)
128 I/O 192 I/O 256 I/O 384 I/O
84
PLCC
100
PQFP
100
TQFP
144
LQFP
160
PQFP
208
PQFP
240
PQFP
304
PQFP
(2)
352
SBGA
(2)
Notes: 1. Pads labeled GND or VCC are internally bonded to Ground or VCC planes within the package. They have no direct con-
nection to any specific package pin.
2. This package has an inverted die.
3. On-chip tri-state.
AT40K05
AT40K05LV
AT40K10
AT40K10LV
AT40K20
AT40K20LV
AT40K40
AT40K40LV Bottom Side (Left to Right)
128 I/O 192 I/O 256 I/O 384 I/O
84
PLCC
100
PQFP
100
TQFP
144
LQFP
160
PQFP
208
PQFP
240
PQFP
304
PQFP
(2)
352
SBGA
(2)
VCC VCC VCC VCC 33 28 25 37 41 55 61 228 VCC
(1)
M2 M2 M2 M2 34 29 26 38 42 56 62 227 AC23
I/O33,
GCK3
I/O49,
GCK3
I/O65,
GCK3
I/O97,
GCK3
35 30 27 39 43 57 63 226 AE24
I/O34
(HDC)
I/O50
(HDC)
I/O66
(HDC)
I/O98
(HDC)
36 31 28 40 44 58 64 225 AD23
I/O35 I/O51 I/O67 I/O99 41 45 59 65 224 AC22
I/O36 I/O52 I/O68 I/O100 42 46 60 66 223 AF24
I/O37 I/O53 I/O69 I/O101 32 29 43 47 61 67 222 AD22
Notes: 1. Pads labeled GND or VCC are internally bonded to Ground or VCC planes within the package. They have no direct con-
nection to any specific package pin.
2. This package has an inverted die.