Instruction Manual

34
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
AC Timing Characteristics – 3.3V Operation AT40KLV
Delays are based on fixed loads and are described in the notes.
Maximum times based on worst case: V
CC
= 3.0V, temperature = 70°C
Minimum times based on best case: V
CC
= 3.6V, temperature = 0° C
Maximum delays are the average of t
PDLH
and t
PDHL
.
All input IO characteristics measured from a V
IH
of 50% of V
DD
at the pad (CMOS threshold) to the internal V
IH
of 50% of
V
DD
. All output IO characteristics are measured as the average of t
PDLH
and t
PDHL
to the pad V
IH
of 50% of V
DD
.
Cell Function Parameter Path -3 Units Notes
Repeaters
Repeater t
PD
(Maximum) L -> E 2.2 ns 1 unit load
Repeater t
PD
(Maximum) E -> E 2.2 ns 1 unit load
Repeater t
PD
(Maximum) L -> L 2.2 ns 1 unit load
Repeater t
PD
(Maximum) E -> L 2.2 ns 1 unit load
Repeater t
PD
(Maximum) E -> IO 1.4 ns 1 unit load
Repeater t
PD
(Maximum) L -> IO 1.4 ns 1 unit load
All input IO characteristics measured from a V
IH
of 50% of V
DD
at the pad (CMOS threshold) to the internal V
IH
of 50% of
V
DD
. All output IO characteristics are measured as the average of t
PDLH
and t
PDHL
to the pad V
IH
of 50% of V
DD
.
Cell Function Parameter Path -3 Units Notes
IO
Input t
PD
(Maximum) pad -> x/y 1.9 ns No extra delay
Input t
PD
(Maximum) pad -> x/y 5.8 ns 1 extra delay
Input t
PD
(Maximum) pad -> x/y 11.5 ns 2 extra delays
Input t
PD
(Maximum) pad -> x/y 17.4 ns 3 extra delays
Output, Slow t
PD
(Maximum) x/y/E/L -> pad 9.1 ns 50 pf load
Output, Medium t
PD
(Maximum) x/y/E/L -> pad 7.6 ns 50 pf load
Output, Fast t
PD
(Maximum) x/y/E/L -> pad 6.2 ns 50 pf load
Output, Slow t
PZX
(Maximum) oe -> pad 9.5 ns 50 pf load
Output, Slow t
PXZ
(Maximum) oe -> pad 2.1 ns 50 pf load
Output, Medium t
PZX
(Maximum) oe -> pad 7.4 ns 50 pf load
Output, Medium t
PXZ
(Maximum) oe -> pad 2.7 ns 50 pf load
Output, Fast t
PZX
(Maximum) oe -> pad 5.9 ns 50 pf load
Output, Fast t
PXZ
(Maximum) oe -> pad 2.4 ns 50 pf load