Instruction Manual

32
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
Note: 1. Parameter based on characterization and simulation; it is not tested in production.
DC Characteristics – 3.3V Operation Commercial/Industrial AT40KLV
Symbol Parameter Conditions Minimum Typical Maximum Units
V
IH
High-level Input Voltage
CMOS 70% V
CC
V
TTL 2.0 V
V
IL
Low-level Input Voltage
CMOS -0.3 30% V
CC
V
TTL -0.3 0.8 V
V
OH
High-level Output Voltage
I
OH
=4mA
V
CC
=V
CC
Minimum
2.1 V
I
OH
=12mA
V
CC
=3.0V
2.1 V
I
OH
=16mA
V
CC
=3.0V
2.1 V
V
OL
Low-level Output Voltage
I
OL
=-4mA
V
CC
=3.0V
0.4 V
I
OL
=-12mA
V
CC
=3.0V
0.4 V
I
OL
=-16mA
V
CC
=3.0V
0.4 V
I
IH
High-level Input Current
V
IN
=V
CC
Maximum 10.0 µA
With pull-down, V
IN
=V
CC
75.0 150.0 300.0 µA
I
IL
Low-level Input Current
V
IN
=V
SS
-10.0 µA
With pull-up, V
IN
=V
SS
-300.0 -150.0 -75.0 µA
I
OZH
High-level Tri-state Output
Leakage Current
Without pull-down,
V
IN
=V
CC
Maximum
10.0 µA
With pull-down,
V
IN
=V
CC
Maximum
75.0 150.0 300.0 µA
I
OZL
Low-level Tri-state Output
Leakage Current
Without pull-up, V
IN
=V
SS
-10.0 mA
With pull-up, V
IN
=V
SS
CON = -500 µA
TO -125 µA
-150.0 CON = -500 µA
TO -125 µA-
µA
I
CC
Standby Current
Consumption
Standby, unprogrammed 0.6 1.0 mA
C
IN
Input Capacitance All pins 10.0 pF