Instruction Manual

30
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
FreeRAM Synchronous Timing Characteristics
Single-port Write/Read
Dual-port Write with
Read
Dual-port Read
WE
ADDR
DATA
t
CLKH
t
WCS
t
ACS
t
DCH
t
WCH
t
ACH
012
CLK
t
OXZ
t
DCS
3
OE
t
OZX
t
AD
WE
WR ADDR
WR DATA
RD DATA
t
CLKH
t
WCS
t
ACS
t
CYC
t
WCH
t
CD
t
ACH
= WR ADDR 1RD ADDR
01 2
CLK
t
CLKL
t
DCS
t
DCH
RD ADDR
DATA
01
t
OZX
OE
t
OXZ
t
AD