Instruction Manual

29
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
FreeRAM Asynchronous Timing Characteristics
Single-port Write/Read
Dual-port Write with
Read
Dual-port Read
01
WE
ADDR
OE
DATA
23
t
WEL
t
AWS
t
AWH
t
OH
t
OXZ
t
DS
t
DH
t
OZX
t
AD
01
WE
WR ADDR
WR DATA
RD DATA
2
t
WEL
t
AWS
t
AWH
t
WEH
t
DD
t
DH
t
WD
NEWPREV.
NEWPREV.
= WR ADDR 1
OLD
RD ADDR
t
WECYC
RD ADDR
DATA
01
t
OZX
OE
t
OXZ
t
AD