Instruction Manual

26
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
All input IO characteristics measured from a V
IH
of 50% at the pad (CMOS threshold) to the internal V
IH
of 50% of V
CC
.All
output IO characteristics are measured as the average of t
PDLH
and t
PDHL
to the pad V
IH
of 50% of V
CC
.
AC Timing Characteristics – 5V Operation AT40K
Delays are based on fixed loads and are described in the notes.
Maximum times based on worst case: V
CC
= 4.75V, temperature = 70°C
Minimum times based on best case: V
CC
= 5.25V, temperature = 0° C
Maximum delays are the average of t
PDLH
and t
PDHL
.
All input IO characteristics measured from a V
IH
of 50% of V
DD
at the pad (CMOS threshold) to the internal V
IH
of 50%
of V
CC
. All output IO characteristics are measured as the average of t
PDLH
and t
PDHL
to the pad V
IH
of 50% of V
CC
.
Cell Function Parameter Path -2 Units Notes
Repeaters
Repeater t
PD
(Maximum) L -> E 1.3 ns 1 unit load
Repeater t
PD
(Maximum) E -> E 1.3 ns 1 unit load
Repeater t
PD
(Maximum) L -> L 1.3 ns 1 unit load
Repeater t
PD
(Maximum) E -> L 1.3 ns 1 unit load
Repeater t
PD
(Maximum) E -> IO 0.8 ns 1 unit load
Repeater t
PD
(Maximum) L -> IO 0.8 ns 1 unit load
Cell Function Parameter Path -2 Units Notes
IO
Input t
PD
(Maximum) pad -> x/y 1.2 ns No extra delay
Input t
PD
(Maximum) pad -> x/y 3.6 ns 1 extra delay
Input t
PD
(Maximum) pad -> x/y 7.3 ns 2 extra delays
Input t
PD
(Maximum) pad -> x/y 10.8 ns 3 extra delays
Output, Slow t
PD
(Maximum) x/y/E/L -> pad 5.9 ns 50 pf load
Output, Medium t
PD
(Maximum) x/y/E/L -> pad 4.8 ns 50 pf load
Output, Fast t
PD
(Maximum) x/y/E/L -> pad 3.9 ns 50 pf load
Output, Slow t
PZX
(Maximum) oe -> pad 6.2 ns 50 pf load
Output, Slow t
PXZ
(Maximum) oe -> pad 1.3 ns 50 pf load
Output, Medium t
PZX
(Maximum) oe -> pad 4.8 ns 50 pf load
Output, Medium t
PXZ
(Maximum) oe -> pad 1.9 ns 50 pf load
Output, Fast t
PZX
(Maximum) oe -> pad 3.7 ns 50 pf load
Output, Fast t
PXZ
(Maximum) oe -> pad 1.6 ns 50 pf load