Instruction Manual

13
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
Figure 9. RAM Example: 128 x 8 Dual-ported RAM (Asynchronous)
2-to-4
Decoder
Dout(4)
Dout(5)
Dout(6)
Dout(7)
Din Dout
WEN
OEN
Ain Aout
Din Dout
Din Dout
WEN
OEN
Din Dout
Aout Ain
WEN
OEN
Ain Aout
WEN
OEN
Aout Ain
Din Dout
Aout Ain
WEN
OEN
Din Dout
WEN
OEN
Ain Aout
Din Dout
Aout Ain
WEN
OEN
Din Dout
WEN
OEN
Ain Aout
2-to-4
Decoder
Local Buses
Express Buses
Dedicated Connections
Read
Address
Din(0)
Din(1)
Din(2)
Din(3)
Din(4)
Din(5)
Din(6)
Din(7)
Write
Address
WE
Dout(0)
Dout(1)
Dout(2)
Dout(3)