User guide

50
AT25DL161 [DATASHEET]
8795E–DFLASH–12/2012
14.6 Program and Erase Characteristics
Notes: 1. Maximum values indicate worst-case performance after 100,000 erase/program cycles.
2. Not 100% tested (value guaranteed by design and characterization).
14.7 Power-up Conditions
14.8 Input Test Waveforms and Measurement Levels
14.9 Output Test Load
Symbol Parameter Min Typ Max Units
t
PP
(1)
Page Program Time (256 bytes) 1.0 3.0 ms
t
BP
Byte Program Time 8 μs
t
BLKE
(1)
Block Erase Time
4KB 50 200
ms32KB 250 600
64KB 550 950
t
CHPE
(1)(2)
Chip Erase Time 16 28 sec
t
SUSP
Suspend Time
Program 10 20
μs
Erase 25 40
t
RES
Resume Time
Program 10 20
μs
Erase 12 20
t
OTPP
(1)
OTP Security Register Program Time 200 500 μs
t
WRSR
(2)
Write Status Register Time 200 ns
Symbol Parameter Min Max Units
t
VCSL
Minimum V
CC
to Chip Select Low Time 70 μs
t
PUW
Power-up Device Delay Before Program or Erase Allowed 10 ms
V
POR
Power-on Reset Voltage 1.2 1.55 V
AC
Driving
Levels
AC
Measurement
Level
0.1V
CC
V
CC
/2
0.9V
CC
t
R
, t
F
< 2ns (10% to 90%)
Device
Under
Test
15pF (frequencies above 70MHz)
or
30pF