Owner manual
Table Of Contents
- ADC1175
- General Description
- Features
- Key Specifications
- Applications
- Pin Configuration
- Ordering Information
- Block Diagram
- Pin Descriptions and Equivalent Circuits
- Absolute Maximum Ratings
- Operating Ratings(Notes , )
- Converter Electrical Characteristics
- Typical Performance Characteristics
- Specification Definitions
- Timing Diagram
- FIGURE 2. tEN, tDISTest Circuit
- Functional Description
- Applications Information
- 1.0 THE ANALOG INPUT
- 2.0 REFERENCE INPUTS
- FIGURE 3. Simple, Low Component Count, Self -Bias Reference application. Because of resistor toleran
- FIGURE 4. Better defining the ADC Reference Voltage. Self-bias is still used, but the reference volt
- FIGURE 5. Driving the reference to force desired values requires driving with a low impedance source
- 3.0 POWER SUPPLY CONSIDERATIONS
- 4.0 THE ADC1175 CLOCK
- 5.0 LAYOUT AND GROUNDING
- FIGURE 6. Layout example showing separate analog and digital ground planes connected below the ADC11
- 6.0 DYNAMIC PERFORMANCE
- FIGURE 7. Isolating the ADC clock from Digital Circuitry.
- 7.0 COMMON APPLICATION PITFALLS
- FIGURE 8. 5.5 MHz Low Pass Filter to Eliminate Harmonics at the Signal Input.
- FIGURE 9. 11 MHz Low Pass filter to eliminate harmonics at the signal input. Use at input frequencie
- Physical Dimensions
Pin Descriptions and Equivalent Circuits (Continued)
Pin
No. Symbol Equivalent Circuit
Description
2, 24 DV
SS
The ground return for the digital supply. AV
SS
and
DV
SS
should be connected together close to the
ADC1175.
14, 15,
18
AV
DD
Positive analog supply pin. Connected to a clean,
quiet voltage source of +5V. AV
DD
and DV
DD
should
have a common source and be separately bypassed
with a 10 µF capacitor and a 0.1 µF ceramic chip
capacitor. See Section 3.0 for more information.
20, 21 AV
SS
The ground return for the analog supply. AV
SS
and
DV
SS
should be connected together close to the
ADC1175 package.
ADC1175
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