User's Guide

Revision 1.0 Page 48 of 75
nRF24L01+ Preliminary Product Specification
Table 19. Command set for the nRF24L01+ SPI
The W_REGISTER and R_REGISTER commands operate on single or multi-byte registers. When accessing
multi-byte registers read or write to the MSBit of LSByte first. You can terminate the writing before all bytes
in a multi-byte register are written, leaving the unwritten MSByte(s) unchanged. For example, the LSByte
of
RX_ADDR_P0 can be modified by writing only one byte to the RX_ADDR_P0 register. The content of the
status register is always read to MISO after a high to low transition on CSN.
Note: The 3 bit pipe information in the STATUS register is updated during the IRQ pin high to low
transition. The pipe information is unreliable if the
STATUS register is read during an IRQ pin
high to low transition.
Command name
Command
word (binary)
# Data bytes Operation
R_REGISTER
000A AAAA 1 to 5
LSByte first
Read command and status registers. AAAAA =
5 bit Register Map Address
W_REGISTER 001A AAAA 1 to 5
LSByte first
Write command and status registers. AAAAA = 5
bit Register Map Address
Executable in power down or standby modes
only.
R_RX_PAYLOAD 0110 0001 1 to 32
LSByte first
Read RX-payload: 1 – 32 bytes. A read operation
always starts at byte 0. Payload is deleted from
FIFO after it is read. Used in RX mode.
W_TX_PAYLOAD 1010 0000 1 to 32
LSByte first
Write TX-payload: 1 – 32 bytes. A write operation
always starts at byte 0 used in TX payload.
FLUSH_TX
1110 0001 0 Flush TX FIFO, used in TX mode
FLUSH_RX 1110 0010 0 Flush RX FIFO, used in RX mode
Should not be executed during transmission of
acknowledge, that is, acknowledge package will
not be completed.
REUSE_TX_PL 1110 0011 0 Used for a PTX device
Reuse last transmitted payload.
TX payload reuse is active until
W_TX_PAYLOAD or FLUSH TX is executed. TX
payload reuse must not be activated or deacti-
vated during package transmission.
R_RX_PL_WID
a
0110 0000 1 Read RX payload width for the top
R_RX_PAYLOAD in the RX FIFO.
W_ACK_PAYLOAD
a
1010 1PPP 1 to 32
LSByte first
Used in RX mode.
Write Payload to be transmitted together with
ACK packet on PIPE PPP. (PPP valid in the
range from 000 to 101). Maximum three ACK
packet payloads can be pending. Payloads with
same PPP are handled using first in - first out
principle. Write payload: 1– 32 bytes. A write
operation always starts at byte 0.
W_TX_PAYLOAD_NO
ACK
a
1011 0000 1 to 32
LSByte first
Used in TX mode. Disables AUTOACK on this
specific packet.
NOP 1111 1111 0 No Operation. Might be used to read the STATUS
register
a. The bits in the FEATURE register shown in Table 27. on page 60 have to be set.