Specifications

EPC-21/22 Hardware Reference
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Cache (EPC-22 only)
The cache is a 64 KB four-way set-associative cache. This is a write-through cache,
meaning that memory writes from the 386SL that hit the cache (find the addressed
location in the cache) also write into the DRAM.
Addresses from 0 to 640K are cached. Addresses from 640K to 1M are not cached.
Addresses from 1M to the top of installed memory are cached with the exception of a
secondary graphics frame buffer such as is used on the EXM-14 Live video board.
ROM and ROM Shadowing
The EPC contains a BIOS EPROM that is mapped into the top of the processor's
25-bit address space. The EPROM contains the PC BIOS, self test functions, and the
setup screen program.
For best possible performance, the BIOS initialization software copies the ROM
contents into DRAM (called shadowing) at addresses 0F0000-0FFFFF (also called
the "F" page). The BIOS also searches for the existence of a video adapter containing
a video BIOS. If a video BIOS is found, it is copied into the 0Cxxxx ("C" page) area
of DRAM.
After copying into these areas, the BIOS write-protects them. Subsequent writes to
these areas complete successfully but do not alter the data.
Battery
The battery powers the CMOS RAM and Time of Day clock when system power is
not present. At 60°C, the battery should have a shelf life of over four years. In a
system that is powered on much of the time and where the ambient power-off
temperature is less than 60°C, the battery is estimated to have a life of 10 years.
The battery supplied with the EPC is a 23mm. 3V lithium "coin" battery or equivalent
(e.g. Panasonic BR2330 or Rayovac BR2335). It is mounted on the component side
of the circuit board near the bottom front corner. Should the battery fail, you may
obtain and install a replacement. Figure 2 below illustrates how to change the
battery.