Specifications

Theory of Operation
EPC-100 Hardware Reference 4-13
Parallel Port
The printer port is a bi-directional IEEE1284-C PC parallel port. The parallel port
supports bi-directional communication compatible with the PS/2 definition. It is
configured as LPT1 and mapped to I/O address 378h-37Fh and uses interrupt IRQ7.
If not needed, LPT1 can be disabled in the BIOS Setup Integrated Peripherals Sub-
Menu to free up the I/O address and interrupt for usage by other expansion products.
Floppy Controller
The SMC FC37C665IR Super I/O chip, used to implement the serial and parallel
ports, is also used to implement a standard PC floppy disk port. The device resides
on the ISA bus, and is accessed at the standard PC I/O addresses of 3F0h-3F7h.
Interrupts are signaled on IRQ6.
The floppy interface connector is located on the I/O board and is not available at the
front panel because it is normally only used for diagnostics or for initializing the hard
disk(s).
USB Ports
The Universal Serial Bus (USB) controller is a host/hub controller and moves data
between the main system memory and devices on the serial bus. The USB controller
also includes the first level hub. This permits connection of two USB peripheral
devices directly to the PIIX3 without an external hub. If more devices are required,
an external hub can be connected to any one of the built in ports.
USB architecture has the concept of all devices connected to it being serviced
through two software layers known as SBS (serial bus services) and HCS (host
controller services). SBS allocates the necessary bandwidth for every device
connected on the bus and builds a scheduler to service these devices at the required
intervals. SBS passes the schedule information to the HCS layer. The HCS uses this
information to build a schedule table and command blocks that hardware
understands. The schedule table and command blocks are located in the system
memory and contain information including the addresses for data movements to/from
system memory. The current implementation of the USB support software may not
support these features at initial product availability.
Two host-side USB ports are provided on the front panel. The USB root hub is built
into the PIIX3 chip as part of the 82430HX chip set. The USB’s PCI configuration