Specifications

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EPC-30 Hardware Reference
Page 42
2E8 IRQ 3,5,9
Table 3-2. COM Locations/Interrupts
The LPT1 parallel port is located in the I/O address range 0x378-
0x37F. LPT1 parallel port interrupts are signaled using the AT bus
interrupt IRQ7. Connection to this port is made via a 26-pin
shrouded stake-pin header. This is a multi-mode IBM PC/XT,
PC/AT and PS/2-compatible bi-directional parallel port. It also
supports enhanced modes including: Enhanced Parallel Port (EPP)
versions 1.7 and 1.9, and Extended Capabilities Port (ECP). These
enhanced features are IEEE 1284-1 Compliant.
PCMCIA controller
The EPC-30 includes a PCMCIA controller, using the Cirrus Logic
CL-PD6710 device. This device is compatible with the popular
82365 interface.
The connector employed accepts type I, type II, or type III cards.
12V VPP is supplied to the memory card as required, as is 5V and
3.3V (if the 3.3V regulator is installed).
Refer to Chapter 2 for information about BIOS extensions. Refer to
Appendix F for details of the software support of the PCMCIA
controller.
Watchdog timer
A watchdog timer function is included as part of the functionality of
the Intel386 EX processor and is connected to provide a RESET
signal to the CPU and ISA bus connector in the event that software
loses control of the system.
ISA-bus
Connection is made to the ISA-bus through two alternate connector
schemes. The first is a standard PC/AT-style card edge connector.
This connector includes two sections: one is a 31-position
connector, and the second an 18-position connector. Each position
has one contact on each side of the board.
The second ISA-bus connection may be made via two standard
0.100" [2.54 mm] square-pin type sockets arranged to meet the
PC/104 standard. The header corresponding to the 31-position card
edge is a 32x2 position socket, and the header corresponding to the
18-position card edge is a 20x2 position socket. "Extra" pins on
these header connectors are connected to ground. These sockets