Specifications

GG
Glossary
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BIOS Update: A process whereby an existing, uncorrupted BIOS image in the flash
boot device is overwritten with a new image. Also referred to as a flash update.
Bit: A binary digit.
Boot: The process of starting a computer and loading the operating system from a
powered down state (cold boot) or after a computer reset (warm boot). Before the
operating system loads, the computer performs a general hardware initialization and
resets internal registers.
Boot Block: A write-protected 16KB section of the flash boot device located at
physical address FFFFC000h to FFFFFFFFh which contains code to perform
rudimentary hardware intitialization at system power up. The boot block also contains
code to establish an Xmodem serial communication link with a host PC when
reflashing the BIOS.
Boot Device: The storage device from which the computer boots the operating
system.
Boot Sequence: The order in which a computer searches external storage devices for
an operating system to boot. The boot device must be the first in the boot sequence.
Byte: A group of 8 bits.
C
Central Processing Unit (CPU): A semiconductor device which performs the
processing of data in a computer. The CPU, also referred to as the microprocessor,
consists of an arithmetic/logic unit to perform the data processing, and a control unit
which provides timing and control signals necessary to execute instructions in a
program.
Chipset: One or more integrated circuits that, along with a CPU, memory, and other
peripherals, implements an IBM PC-AT compatible computer. The chipset typically
implements a DRAM controller, bus, interface logic, and PC peripheral devices.
Complimentary Hi-performance Metal Oxide Semiconductor (CHMOS): A
proprietary CMOS technology used by Intel Corporation in the 386EX CPU and other
Intel microprocessor ICs.
Column Address Strobe (CAS): An input signal from the DRAM controller to an
internal DRAM latch register specifying the column at which to read or write data.
The DRAM requires a column address and a row address to define a memory address.
Since both parts of the address are applied at the same DRAM inputs, use of column
addresses and row addresses in a multiplexed array allows use of half as many pins to
define an address location in a DRAM device as would otherwise be required.
COM Port: A bi-directional serial communication port which implements the
RS-232 specification.