Specifications

Chapter 6: The VMEbus Interface
Page 61
• Big endian, characteristic of Motorola microprocessors and the VMEbus
environment in general, where the most-significant data byte (MSB) is
stored in the lowest byte address.
Address + 3 Address + 2 Address + 1 Address
Byte 3 Byte 2 Byte 1 Byte 0
LSB MSB
The EPC-5A contains programmable byte-swapping hardware to allow programs to
read or write VMEbus memory in either byte order. When using the VME memory
window to access the VMEbus, the order is selected by bit 5 (BORD) in the VME
modifier register (8151).
When using direct memory mapping, the order is address-range dependent (e.g.,
E0000000-E0FFFFFF accesses the A24 space with big endian byte ordering, and
20000000-20FFFFFF accesses the A24 space with little endian byte ordering).
When performing a single byte (D08) access, the byte order makes no difference.
However, word (D16) or double-word (D32) accesses may require byte-swapping.
When little-endian is selected, bytes pass straight through unchanged. Little endian
should only be used when reading or writing data between two Intel processor
systems. The results of using little-endian byte ordering to transfer a double-word
integer between an Intel processor and a Motorola processor are shown below.
486
Address
Motorola
Address
AddrAddr+1Addr+2
Addr+3
AddrAddr+1Addr+2
Addr+3
LSB
MSB
1032
54
76
10
32
5476
= 76543210h
= 10325476h
Figure 6-3. Little-Endian Byte Order.
Since the 486 processor uses Addr as the least-significant byte and the Motorola
processor uses Addr as the most-significant byte, the processor receiving the data gets
a “scrambled” value.
When big-endian is selected, the bytes are swapped between the 486 and VME. See
the diagram below.