Specifications

Page I-I
Index
A
A16, 3, 58, 59, 60, 72, 77, 78, 79
A24, 3, 58, 59, 60, 63, 69, 70, 72, 78
A32, 3, 58, 59, 60, 63, 69, 70, 72, 78,
81
access time, G-1
ACFAIL, 75, 82
adapter cable, 25
adapter module, 3, 20, 21, 53
address, G-1
address lines, 59
address modifier, 59, 60, 63, 74, 79
address modifiers, 78
address space, 3
address strobe, 76
ANSI, G-1
arbitration mode, 71
arbitration priority, 71
Autotype
term defined, G-1
B
backplane, 12
backplane jumpers, 10, 12
base address, 63
battery, 52, 87, 89, 95, 100
BERR, 58, 63, 75, 82
BG0 - BG3, 10
BG0In - BG3In, 10
BG0Out - BG3Out, 10
big-endian, 59, 61, 64
BIOS, 3, 24, 25, 68, 78, 96, G-2
BIOS Data Area, G-2
BIOS extension
term defined, G-2
BIOS Recovery
term defined, G-2
BIOS setup, 54
BIOS Update
term defined, G-2
block transfers, 63
Boot Block
term defined, G-2
Boot device
term defined, G-2
Boot Sequence
term defined, G-3
BP2, 16
BP3A, 18
BP4, 17
BP4A, 20
BP5, 19
BP6, 21
bus arbiter, 57
bus error, 75
bus grant signals, 10
bus grant timeout, 58
bus monitoring, 76
Bus release, 70
bus timeout, 58
Bus Timer function, 57
byte order, 61
byte ordering, 60, 74
byte-swapping, 59, 61, 74
C
cache, 47, 64, 65
Central Processing Unit (CPU)
term defined, G-3